Plasma Technology  


1 µm TiN/ 0.5 µm Si with resist mask


0.25 µm TiN/ 0.3 µm Si without resist


0.25 µm TiN/ 0.3 µm Si with resist

Low Pressure - RIE
Parallel Plate Reactor
13.56 MHz Plasma Excitation
Shower Head Gas Inlet
Process Gas: Fluorine based

anisotropic profile
Rate: 25 nm/ min
Mask used here: trilevel resist

Courtesy of the University of Bochum,
Lehrstuhl für Elektronische Bauelemente
(work done on an earlier OPT RIE model)


90 nm line etched in TiN

etch rate > 100 nm/ min (ICP)

selectivity TiN : HSQ 2 - 3.5 : 1

overetch with very high selectivity
to gate oxide (up to 80 : 1)

uniformity over 150 mm < ± 3 %

Cl/ Br based process chemistry

Courtesy of AMO Aachen
M.C. Lemme, J.K. Efavi, T. Mollenhauer,
M. Schmidt, H.D.B. Gottlob, T. Wahlbrink,
H. Kurz, "Nanoscale TiN metal gate
technology for CMOS integration",
Microelectronic Engineering, 83(4-9):
1551-1554, 2006.

Anisotropic TiN Etching

RIE schematic

Plasmalab Sytem 100
RIE with vacuum loadlock


Reactive Ion Etching with ICP source

Plasmalab System 100
with loadlock and ICP180 source

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